EncartaLabs

OpenVMS Internals

( Duration: 5 Days )

The OpenVMS Internals training course is designed to examine the components, structures and mechanisms of the OpenVMS Alpha operating system. It is intended for those Participants requiring an extensive understanding of these areas. This part of the Program lays the foundations for understanding the mechanisms that will be used throughout the rest of the internals offerings at a programming level.

By attending OpenVMS Internals workshop, Participants will learn to:

  • Describe and differentiate between system context and process context
  • Describe process creation and supporting process related data structures
  • Describe the implementation of selected interrupt service routines including AST delivery, scheduling, hardware clock and software timer routines
  • Describe the processing and roles of interrupts and exceptions on OpenVMS
  • Describe the roles of the following synchronization techniques: IPL, spinlocks, mutexes, and locks
  • Describe the data structures that constitute a process and examine them using SDA

  • The ability to read Macros
  • Ability to program in C

  • OpenVMS System Managers
  • OpenVMS System Programmers

COURSE AGENDA

1

Internals Concepts

  • Data Structures
  • Data Structure Fields
  • Linked Lists
  • Stacks
  • Asynchronous Events and Context
  • Synchronization
  • OpenVMS Symbolic Naming Conventions
2

General Alpha Architecture

  • CISC versus RISC Architectures
  • Computer Architectures
  • Alpha RISC Architecture Overview
  • Privileged Architecture Library
  • VAX versus Alpha Architecture
3

Data Formats and General Instructions

  • Data Representation
  • Floating Point Data Representation
  • Instruction Formats
  • Data Alignment Issues
4

OpenVMS Calling Standard

  • Alpha Calling Standard
  • Descriptors
  • Alpha Calling Standard Mechanics
  • Procedure Descriptors
  • Variable-Size Stack Frame
  • Alpha Calling Standard
5

OpenVMS PAL Code

  • General Non-Privileged PALcode
  • OpenVMS Queues
  • OpenVMS Internal Processor Registers
6

Synchronization and Architectural Considerations

  • Atomicity
  • Unintentionally Shared Data
  • Read/write Ordering
7

Introduction to SDA

  • Debugging Tools Available
  • SDA Requirements and Uses
  • Command Summary
  • Commonly Used SDA SHOW Options
  • Symbols and Operators
  • CLUE
8

The Process

  • Process concepts
  • The Process and Kernel Threads
  • Process Data Structures Overview
  • Job Information Block (JIB)
  • Kernel Threads
  • PCB Vector Table
  • Virtual Address Space
9

Interrupts and Exceptions

  • Interrupts and Exceptions
  • Processor Status Register
  • SCB
  • OpenVMS Access Modes
  • Change Mode Instructions
  • System Service Dispatching
10

Programming and System Content

  • The Change Mode System Services
  • Using IPL for Synchronization
  • Symmetric Multiprocessing Systems
  • Spinlock Acquire Timeouts
  • Mutual Exception Semaphores (Mutexes)
  • Mutex Tracing
  • Dynamic Memory Mechanisms
  • Pool Reclamation
11

Process Context Synchronization

  • AST Concepts
  • Timer Queue Entries
  • Timer Queue Entry Changes
  • Distributed Locking Mechanism
  • Dynamic Resource Remastering
  • Pre-v8.3 Dydnamic Resource Remastering
  • v8.3 Lock Manager Changes
  • Deadlock Detection in a Cluster
  • Sub-Second Deadlock Wait
  • Lock Review
  • Monitoring Lock Activity
  • Resolving Lock Resource Contention
  • Dedicated CPU Lock Manager
  • Dedicated CPU Lock Manager Interaction
12

The Big Picture Review

  • Calling Standard
  • Process Structures
  • Locating Structures
  • Kernel Threads
  • System Mechanisms
  • AST Delivery
  • Synchronization
  • Nonpaged Pod Summary

Encarta Labs Advantage

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  • All our trainings are conducted in workshop mode with more focus on hands-on sessions

View our other course offerings by visiting http://encartalabs.com/course-catalogue-all.php

Contact us for delivering this course as a public/open-house workshop/online training for a group of 10+ candidates.

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